set_design_rules

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Set the project design rules (.kicad_pro) and copper layer count. Works on a board workspace and on a generated design (create_design → start_board). On a generated design the rules go into circuit.kicad_pro/.kicad_dru in place (the previous ones are snapshotted under rules_revisions/), are kept by every later project write (project.zip, a new board run), the copper is not changed and KiCad DRC judges the board against them at once: the reply carries the DRC counts and whether the Gerbers are released; the next start_board routes to the default_* values. copper_layers, stackup and board_thickness_mm are workspace-only (a generated design changes them with a new board). preset "jlcpcb" applies JLCPCB's published minimums for the layer count and writes their per-feature limits (plated rings, pad hole spacing, hole-to-track) as KiCad custom rules (.kicad_dru) that run_drc checks; explicit values override the minimums. Board minimums (min_*), the Default net class (default_*), and named net classes with their net patterns. route_board routes with these rules and run_drc checks against them. Changing copper_layers rebuilds the stackup; tracks on removed layers are reported. copper_layers 1 is a single-sided board (hand etching): the KiCad file keeps F.Cu and B.Cu, and from then on the routers hold to one face (B.Cu as soon as a THT pad exists, else F.Cu) and place no via; copper on the other face is removed.